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Messages - Gracana

1
Bus Blaster JTAG debugger / Re: TDO Stuck
Further testing with a multimeter shows that CPLD pin 14 always measures approximately 2.8V when programmed with buffer logic >1.2. Under this condition, JTAG software always reads ones. When the CPLD is programmed with buffer logic 1.2, CPLD pin 14 always measures approximately 1V, and JTAG software always reads zeroes.
2
Bus Blaster JTAG debugger / Bus Blaster Docs WRT OpenOCD
I've been talking with folks in the OpenOCD IRC, and they've noted that we should be using the ftdi driver, not the old unsupported ft2232 driver that the bus blaster docs recommend.

Also, we made a board configuration for writing to the CPLD. The forum software is convinced I'm a spam bot, so I can't link the file, but I can paste it here:

Code: [Select]
# Dangerous Prototypes - Bus Blaster
#
# http://dangerousprototypes.com/docs/Bus_Blaster
#
# To reprogram the on-board CPLD do:
# openocd -f board/dp_busblaster_v3.cfg -c "adapter_khz 1000; init; svf <path_to_svf>; shutdown"
#

source [find interface/ftdi/dp_busblaster.cfg]
ftdi_channel 1

jtag newtap xc2c32a tap -expected-id 0x06e1c093 -irlen 8

Put that into the board directory and you're good to go. In a week or so that should be merged into the main branch, so if you're reading this in the future, you may already have it.
3
Bus Blaster JTAG debugger / TDO Stuck
It seems that something is wrong with the v3c bus blaster I just received.

If I program the CPLD with v1.4 buffer logic and try 'detect' with TDO tied to VTG or GND, I see "warning: TDO seems to be stuck at 1."

If I program the CPLD with v1.2 buffer logic and try 'detect' with TDO tied to VTG or GND, I see "warning: TDO seems to be stuck at 0."

Is it broken?

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