XT IDE disk controller

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Benchmarking: [http://vintage-blog.peacon.co.uk/wiki/DOS_Disk_Tester a simple test utility] (be sure to set buffers=99 in config.sys). [http://dangerousprototypes.com/forum/viewtopic.php?f=19&t=2657&start=30#p26109 Results].
Benchmarking: [http://vintage-blog.peacon.co.uk/wiki/DOS_Disk_Tester a simple test utility] (be sure to set buffers=99 in config.sys). [http://dangerousprototypes.com/forum/viewtopic.php?f=19&t=2657&start=30#p26109 Results].
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The "[http://www.vintage-computer.com/vcforum/showthread.php?23971-HOWTO-Improve-the-performance-of-the-XTIDE-controller Chuck mod]" performance enhancement can be done just by programming new logic into the CPLD.
+
The "[http://www.vintage-computer.com/vcforum/showthread.php?23971-HOWTO-Improve-the-performance-of-the-XTIDE-controller Chuck mod]" performance enhancement can be done just by programming new logic into the CPLD with the flowing files:
 +
*[http://dangerous-prototypes-open-hardware.googlecode.com/svn/trunk/XTIDE_CPLD/XTideCPLD1_XC9536_5V_v1_Chuck_mod/XTideCPLD1_XC9536_5V_v1_Chuck_mod.xsvf 1v 5v XC9536]
 +
*[http://dangerous-prototypes-open-hardware.googlecode.com/svn/trunk/XTIDE_CPLD/XTideCPLD1_XC9536XL_3.3V_v1a_Chuck_mod/XTideCPLD1_XC9536XL_3.3V_v1a_Chuck_mod.xsvf v1a 3.3v XC9536XL]
 +
*[http://dangerous-prototypes-open-hardware.googlecode.com/svn/trunk/XTIDE_CPLD/XTideCPLD1_XC9572XL_3.3V_v1a_Chuck_mod/XTideCPLD1_XC9572XL_3.3V_v1a_Chuck_mod.xsvf v1a 3.3v XC9572XL]
==Latest Schematic==
==Latest Schematic==

Revision as of 18:03, 22 August 2011

Prototype PCBs are available in the free PCB drawer.


Contents

Overview

"The XT-IDE project is a Vintage Computer forum driven project to develop and manufacturer an 8-bit ISA IDE controller. It allows any PC/XT class machine to use modern IDE hard drives or Compact Flash devices for long term storage." (From the XTIDE project wiki)

Our version of the XTIDE controller replaces the 7400-series logic chips with a CPLD, a chip that can be programmed to replace dozens of individual logic chips. The logic is designed in software by drawing a schematic, and then uploaded to the CPLD. New logic circuits can be designed and tested without making new hardware each time.

This project is currently stalled. We had planned to test this in the lab, but we vastly underestimated the difficulty of finding a vintage XT PC. The PCB and CPLD implementation are complete and available in SVN. We've sent out a few boards, but to our knowledge nobody has tested it yet. It's waiting for the right vintage computer enthusiast to give it life.

UPDATE: V1a has been built and tested, it works! Thanks Pietja!

Prototypes

Prototype-XTIDE-controller-CPLD.jpg

Version 1a has been tested. It works with a few minor modifications.

Version 1a bugs:

Downloads

Programming and testing

Here are the links to the SVN to program the CPLD with an Bus Pirate:

The bios for the card can be found here, be sure to read the wiki there on how to configure the bios and program the EEPROM with the xtidecfg.com program.

Benchmarking: a simple test utility (be sure to set buffers=99 in config.sys). Results.

The "Chuck mod" performance enhancement can be done just by programming new logic into the CPLD with the flowing files:

Latest Schematic

Cct-CPIDE-44vqfp-v1a.png

Early schematics

Cct-CPIDE-44vqfp.png

PCB

Pcb-XT-IDE-adapter.jpg

  • V1a (PCB cut correctly, uses 3.3volt CPLD

Pcb-xtide.jpg

  • V1 (PCB not cut for XT slot, uses 3.3volt CPLD)
  • VX Not shown, but files are in SVN (PCB not cut, uses 5.0volt CPLD)

Click for a full size placement image.

Partlist

CPIDE-44vqfp-v1a-brd.png

CPIDE-44vqfp.brd.png


partlist
PartQuantityValuePackage
C1,C3,C4,C5,C750.1uFC0603
C2147uFSANYO-OSCON_SMD_A5
C611uFC0603
DIP_SW1EDG-08
H1,H22MOUNT-PAD-ROUND3.63,6-PAD
IC1128C64APDIL28-6
IC2174HC688DWSO20W
IC3,IC4274HCT573DSO20W
IC5174HCT245DWSO20W
IC61XC9572VQ44*VQ44
IDE1MA20-2
JP11ROM ENABLE1X02-S
JP21WRITE ENABLE1X02-S
JP31IRQ_SELECT2X05
JP41CSEL1X03-S
JP61JTAG1X06-S
JP71HD_LED1X02-S
LED11CHIPLED_0805
R1,R22R0603
R3,R4,R5,R6410kR0603
R71151R0603
RN1110kSIL9
RN21SIL9
ST11IBM8BIT
U$3,U$72JUMP2_DESC_OFF
U$41JUMP3_DESC_LEFT
U$51JUMP3_DESC_RIGHT
U$6,WRITE_ENABLE2JUMP2_DESC_ON
VR11MIC5205-3.3YM5SOT-23-5

CPLD logic

XT-IDE-CPLD-.png

  • XTIDE drive logic implemented in the CPLD
  • Software is free ISE Webpack

Design tests

XT-IDE-logic-chips.pngXT-IDE-84plcc.pngXT-IDE-44tqfp.png

Errors

XTIDE-CPLD-3V3-v1b-disconnect.png


XTIDE-CPLD-5V-v1b-disconnect.png

License