Open Bench Logic Sniffer/es

From DP

***UNDER CONSTRUCTION***

Read about the Open Logic Sniffer hardware here.

• Available now for $50, including worldwide shipping
• Now available in the Gadget Factory shop (US),SparkFun (US),eHaJo(DE), Watterott electronic (DE),SK Pang (UK)
• A 5volt tolerant buffer is available for the 16channels of the 'wing' header ($15)

Open Bench Logic Sniffer is an open source logic analyzer. It's designed to support theSUMP logic analyzer software at the lowest possible cost. This project is a collaboration between theGadget Factory and Dangerous Prototypes.

Contents 1 Introduction 1.1 Documentation 1.2 Help 2 Downloads 3 Hardware 4 Software 4.1 How to update 4.1.1 Complete upgrades 4.1.2 FPGA bitstream upgrades 4.1.3 PIC firmware upgrades 5 Logic Analyzer Software 5.1 SUMP fork 5.2 Other SUMP-compatible clients 6 SUMP FPGA core 6.1 New v3 Demon core in Verilog 6.2 Original SUMP VHDL core 7 PIC firmware 8 Links 8.1 Test plans 9 License

Introduction

Project Summary
Name:	Open Bench Logic Sniffer/es
Buy it:	Get one for $50 at Seeed Studio
Price:	$50
Status:	Mature
Manufacturing:	Shipping
Forum:	Open Bench Logic Sniffer/es Forum

• Hardware design overview
• Quick start video (Windows screencast)
• Logic Sniffer quick start guide Connecting, installing drivers and software (Windows, Linux, Mac)
• Logic Sniffer 101 Modes, pin numbering, LEDs, errors
• Logic Sniffer 102 Sample depths, triggers, RLE
• Logic Sniffer 103 More RLE
• Demonstrations and use examples

Documentation

• Oak Micros SUMP handbook
• All Logic Sniffer posts

Help

• Discussion and help forum

Downloads

• Gadget Factory project page

Hardware

• Open Bench Logic Sniffer schematic and partlist
• Logic Sniffer hardware downloads
• 16bit buffer wing hardware downloads
• SUMP VHDL overview videos
• User created cases

Software

There is now a Gadgetfactory complete update package.
This is a simple all-in-one solution for updating.

Software overview / Latest stable release

Item	Website/Documentation	Latest stable release - download link
Boot loader	n/a
PIC firmware	Forum thread	olsv1-firmware-v3.0.zip
FPGA 'Demon' Core	Forum thread	ols_verilog_release7.zip
PC client, Jawi	www.lxtreme.nl/ols	ols-0.9.5-full.tar.gz
Original PIC fw_update (Windows/Linux/Mac)		Forum thread
Original FPGA/ROM ols-loader (Windows/Linux/Mac)	OLS-loader utility	Forum thread
Combined PIC/FPGA update tool (Windows/Linux/Mac?)	OLS-fwloader comprehensive update utility	ols-fwloader-0.1.tar.gz
Windows GUI combined PIC/FPGA update tool	Source on github	ols_winloader_v2.03.zip

For details about the features see the Feature Status page.

• A version by version guide of what works, and what doesn't.

How to update

Complete upgrades

• Logic Sniffer upgrades under Windows (original)
• Logic Sniffer upgrades under Linux
• robot's new comprehensive update application

FPGA bitstream upgrades

• FPGA bitstream/ROM updates (original)
• OLS-loader ROM update utility guide

PIC firmware upgrades

• PIC firmware updates (original)

Some preorder 1 Logic Sniffers shipped without a bootloader. Here's some options to get it fixed:bootloader rescue

Logic Analyzer Software

Logic analyzer client software controls the Logic Sniffer hardware and displays the pretty logic graph.

SUMP fork

We recommend this SUMP client.

Multi-platform Java client. A version of the SUMP client actively developed by Jawi in the forum.

• Alternative Java client homepage
• You'll need Java
• Support and bug reports
• Releases and requests
• Logic Sniffer 102 documents some features of the client
• Reset issues with Arduino

Other SUMP-compatible clients

The original software for the SUMP core used in the Logic Sniffer is a multi-platform Java application.

• SUMP client software

There are several other clients that support the SUMP protocol. They are in various stages of development.

• Overview of several SUMP-compatible clients
• Raphihouri’s Windows/.Net client
• LogicAnalyzer (Java/RCP)
• Yet another client (Python) (Forum thread)
• Sigrok (no release yet)

SUMP FPGA core

New v3 Demon core in Verilog

• SUMP logic analyzer Verilog Demon core documentation

Original SUMP VHDL core

• SUMP logic analyzer project
• SUMP Protocol
• The Logic Sniffer's extended SUMP protocol

PIC firmware

• Upgrade mode protocol
• Logic Sniffer firmware change history
• Logic Sniffer firmware overview

Links

• PIC18F24J50 datasheet
• PIC18F reference manual
• Spartan3E XC3S250E-VQ100 family reference

Test plans

• Buffer test plan

License

• PCB art: CC-BY-SA-NC
• Bootloader: GPL (From Diolan)
• Firmware source: GPL (excluding Microchip USB stack)
• Compiled firmware: CC-BY-SA-NC*

• The compiled firmware uses a USB PID licensed from Microchip for our use. It is limited to 10K units, and licensed only for our OLS hardware production, therefore we have to limit use of firmware compiled with these numbers to non-commercial use. You are free to compile the firmware from source without the PID and use it under the terms of the GPL.