Logic Sniffer: Feature status
From DP
| Feature | v2.1 | v2.11 | v2.12 |
|---|---|---|---|
| Fast SPI data bus | X | X | X |
| Dynamic memory | X | ||
| RLE | 32bit only | 8/16/32bit | 32bit only |
- Fast SPI data bus - the FPGA and PIC communicate over a fast SPI data bus (new in v2)
- Dynamic memory - more memory is available when fewer channels are used (new in v2.12)
- RLE - compression method (32bits usually ok, other configurations still in progress)
| Feature | v0.4 | v0.5 | v0.6 | v2.0 | v2.1 |
|---|---|---|---|---|---|
| Fast SPI data bus | X | X | X | X | X |
| SPI data queuing | X | X | X | X | |
| Binary self-test | X |
- Fast SPI data bus - the FPGA and PIC communicate over a fast SPI data bus (firmware v0.4+)
- SPI data queuing - reduces USB overhead by queuing data in to packets (new in v0.5, fixed in v0.6)
- Binary self-test - A completely revamped self-test in v2.1+ can be triggered from ROM update mode, results can be read out for debugging