Bus Blaster v4 manufacturing resources
From DP
Programming the CPLD with urJTAG
Bus Blaster can program the CPLD itself using our patched version of urJTAG.
- Download and install FTDI drivers for the FT2232 chip
- Download and install UrJTAG
- Copy the patched .exe file (urjtag-revXX.exe) to the install location (C:\Program Files\UrJTAG)
- Copy in.txt to the UrJTAG install location (C:\Program Files\UrJTAG)
- Copy \bsdl and \svf to c:\
Program
jtag> include ./in.txt Connected to libftd2xx driver. IR length: 8 Chain length: 1 Device Id: 00000110111001011100000010010011 (0x06E5C093) Filename: c:/bsdl/XC2C64A_VQ100.bsdl Parsing 1140/1144 ( 99%) Scanned device output matched expected TDO values. jtag>
- Move the MODE jumper to Update Buffer position
- Plug in the Bus Blaster
- Run the patched version of UrJTAG (urjtag-revXX.exe)
- At the UrJTAG command prompt type include ./in.txt to run the in.txt script and program the Bus Blaster
- Push UP ARROW key then ENTER to repeat for each Bus Blaster
Hardware selftest
The hardware self test is part of the factory jtagkey-compatible buffer shipped with the Bus Blaster. This mode allows testing all the connections between the FT2232 and CPLD, and CPLD to pin header.
Warning!!! Ensure Bus Blaster is in test mode before running the test Conflicting pin directions during the test could fry a chip
| PinA | PinB |
|---|---|
| TRST | TDI |
| TMS | TCK |
| RTCK | TDO |
| TSRST | DBGRQ |
| P0 | GND |
| JP4 | JP4 |
- Unplug the Bus Blaster!
- Place a jumper on JP4. This powers the buffer from the main power supply
- Place the MODE jumper in the Normal position
- Connect the pin headers as shown in the table. The P1 connection to ground activates the test buffer
- Plug in the Bus Blaster
- LED lights and pin P64 will measure 3.3volts if the test mode is active
- Run the test utility run.bat file
- The test reports success or fail
- Unplug the Bus Blaster before removing the connections
We highly recommend users upgrade to a non-selftest buffer immediately.
