Bus Blaster

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Project Summary
Name: Bus Blaster
Buy it: Get one for $34.95 at Seeed Studio
Price: $34.95
Status: Mature
Manufacturing: Shipping
Forum: Bus Blaster Forum
Bus-blaster-v2-inuse .jpg

Bus Blaster is an experimental, high-speed JTAG debugger for ARM processors, FPGAs, CPLDs, flash, and more. Thanks to a reprogrammable buffer, a simple USB update makes Bus Blaster v2 compatible with many different JTAG debugger types in the most popular open source software.

  • Based on FT2232H with high-speed USB 2.0
  • Buffered interface works with 3.3volt to 1.5volt targets
  • Reprogrammable buffer is compatible with multiple debugger types
  • Compatible with 'jtagkey', 'KT-link' programmer settings in OpenOCD, urJTAG, and more
  • Should support Serial Wire Debug when available
  • Mini-CPLD development board: self programmable, extra CPLD pins to header
  • Open source (CC-BY-SA)

Bus Blaster v3 is available NOW for $35. Each unit is tested with a real JTAG target before it ships.

Bus Blaster v4 has some features advanced users need, but most people only need v3! Bus Blaster v4 is available NOW for $45.




Bus Blaster v3


Bus Blaster v3 is a minor update to v2. Functionality is nearly identical:

  • Fitted in a DP8049 (80x49 mm) standard PCB, case available here
  • Added series resistors to input and output pins to protect against damage and noise
  • Swapped FT2232 clock output to CPLD pin with global clock feature for potential logic analyzer mode

Design resources:

Bus Blaster v4


Bus Blaster v4 is a redesign of v3/v2 that supports SWV, an obscure extension to a reduced pincount JTAG protocol most people will never use. Unless you need it, stick with v3 and save a few bucks! That's why v4 is down here and v3 is still on top of the page.

  • Can now support the SWV feature of Cortex microcontroller for advance debugging when software support is available
  • SWV is little used and not currently supported in software, most users will be better off with Bus Blaster v3 available here
  • Fitted in a DP9056 (90x56 mm) standard PCB
  • Added series resistors to input and output pins to protect against damage and noise

Design resources:

Bus Blaster v2


Bus Blaster v1




The Bus Blaster will work with many programs that support FT2232 debuggers.


SVF player for CPLDs, FPGAs, and other devices.

Please note that the following git commit fixed a bug that caused UrJTAG to stop working once it was used with openFPGAloader, until the Bus Blaster was disconnected from and reconnected to the USB bus.


Universal utility for programming FPGA

Please note that you need to work with git revision [1] onwards because earlier versions didn't drive ADBUS4 to enable the JTAG buffers.

There are 2 cable types: bus_blaster to drive the JTAG bus, and bus_blaster_b to access the onboard Xilinx CPLD. However, at the moment, openFPGAloader does not support programming the XC2C32A onboard.


Debug server for ARMs, other JTAG chips.

XILINX tools driver

This open source driver supports FT2232-based JTAG debuggers from within the XILINX development tools (Impact, Chipscope and XMD)


  • libxsvf open source SVF and XSVF player library


  • libswd open source 2-wire SWD JTAG debug library


jrev automates the reverse engineering of JTAG connections. The Bus Blaster v2+ with PicoTap buffer works with the FTjrev version for FTDI chips.


EJTAGproxy is a utility for connecting GNU debugger to PIC32 microcontrollers via JTAG or ICSP adapter. Bus Blaster is supported with the JTAGkey-compatible buffer.



There are few different drivers that support the FTDI FT2232 chip under Windows, Linux, and Mac.

FTDI drivers

Not GPL compatible


GPL driver, alternative to D2xx. Built on top of libusb.



  • Hardware: CC-BY-SA
  • Software: CC-0, GPL for UrJTag