Bus Blaster

From DP

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Project Summary
Name:	Bus Blaster
Buy it:	Get one for $34.95 at Seeed Studio
Price:	$34.95
Status:	Mature
Manufacturing:	Shipping
Forum:	Bus Blaster Forum

Bus Blaster is an experimental, high-speed JTAG debugger for ARM processors, FPGAs, CPLDs, flash, and more. Thanks to a reprogrammable buffer, a simple USB update makes Bus Blaster v2 compatible with many different JTAG debugger types in the most popular open source software.

• Based on FT2232H with high-speed USB 2.0
• Buffered interface works with 3.3volt to 1.5volt targets
• Reprogrammable buffer is compatible with multiple debugger types
• Compatible with 'jtagkey', 'KT-link' programmer settings in OpenOCD, urJTAG, and more
• Should support Serial Wire Debug when available
• Mini-CPLD development board: self programmable, extra CPLD pins to header
• Open source (CC-BY-SA)

Bus Blaster v3 is available NOW for $35. Each unit is tested with a real JTAG target before it ships.

Bus Blaster v4 has some features advanced users need, but most people only need v3! Bus Blaster v4 is available NOW for $45.

Contents 1 Downloads 2 Hardware 2.1 Bus Blaster v3 2.2 Bus Blaster v4 2.3 Bus Blaster v2 2.4 Bus Blaster v1 3 Software 3.1 urJTAG 3.2 openFPGAloader 3.3 OpenOCD 3.4 XILINX tools driver 3.5 libxsvf 3.6 libswd 3.7 FTjrev 3.8 EJTAGproxy 3.9 Misc 4 Drivers 4.1 FTDI drivers 4.2 libFTDI 5 Resources 6 License

Downloads

• Bus Blaster package v2.0
• Bus Blaster source r1087 v2.0
• Browse the Bus Blaster GitHub

Hardware

Bus Blaster v3

Bus Blaster v3 is a minor update to v2. Functionality is nearly identical:

• Fitted in a DP8049 (80x49 mm) standard PCB, case available here
• Added series resistors to input and output pins to protect against damage and noise
• Swapped FT2232 clock output to CPLD pin with global clock feature for potential logic analyzer mode

Design resources:

• Bus Blaster v3 design overview
• Bus Blaster v2 & v3 buffer logic makes Bus Blaster compatible with jtagkey, KT-link, and several other programmer types
• Design history and work product, see it come to life
• Bus Blaster v3 revision history

Bus Blaster v4

Bus Blaster v4 is a redesign of v3/v2 that supports SWV, an obscure extension to a reduced pincount JTAG protocol most people will never use. Unless you need it, stick with v3 and save a few bucks! That's why v4 is down here and v3 is still on top of the page.

• Can now support the SWV feature of Cortex microcontroller for advance debugging when software support is available
• SWV is little used and not currently supported in software, most users will be better off with Bus Blaster v3 available here
• Fitted in a DP9056 (90x56 mm) standard PCB
• Added series resistors to input and output pins to protect against damage and noise

Design resources:

• Bus Blaster v4 design overview
• Bus Blaster buffer logic makes Bus Blaster compatible with jtagkey, KT-link, and several other programmer types
• Design history and work product, see it come to life
• Bus Blaster v4 revision history

Bus Blaster v2

• Bus Blaster v2 design overview
• Bus Blaster v2 & v3 buffer logic makes BBv2 compatible with jtagkey and KT-link programmer types
• Design history and work product, see it come to life

Bus Blaster v1

• Design overview
• Buffer connection overview
• Design history and work product, see it come to life

Software

The Bus Blaster will work with many programs that support FT2232 debuggers.

urJTAG

SVF player for CPLDs, FPGAs, and other devices.

• urJTAG can use the libUSB driver or the FTDI drivers
• Bus Blaster urJTAG guide
• UrJTAG
• urjtag ft2232 cable overview
• On-board CPLD patch for Bus Blaster v2

Please note that the following git commit fixed a bug that caused UrJTAG to stop working once it was used with openFPGAloader, until the Bus Blaster was disconnected from and reconnected to the USB bus.

openFPGAloader

Universal utility for programming FPGA

• openFPGAloader

Please note that you need to work with git revision [1] onwards because earlier versions didn't drive ADBUS4 to enable the JTAG buffers.

There are 2 cable types: bus_blaster to drive the JTAG bus, and bus_blaster_b to access the onboard Xilinx CPLD. However, at the moment, openFPGAloader does not support programming the XC2C32A onboard.

OpenOCD

Debug server for ARMs, other JTAG chips.

• OpenOCD will only work with the libUSB drivers
• Bus Blaster OpenOCD guide
• OpenOCD
• OpenOCD 4.0 for Windows

XILINX tools driver

This open source driver supports FT2232-based JTAG debuggers from within the XILINX development tools (Impact, Chipscope and XMD)

• XILINX JTAG tools on Linux without proprietary kernel modules
• On-board CPLD patch for Bus Blaster v2

libxsvf

• libxsvf open source SVF and XSVF player library

libswd

• libswd open source 2-wire SWD JTAG debug library

FTjrev

jrev automates the reverse engineering of JTAG connections. The Bus Blaster v2+ with PicoTap buffer works with the FTjrev version for FTDI chips.

• jrev
• Patches and more tips in the forum

EJTAGproxy

EJTAGproxy is a utility for connecting GNU debugger to PIC32 microcontrollers via JTAG or ICSP adapter. Bus Blaster is supported with the JTAGkey-compatible buffer.

Misc

• Bus Blaster custom USB VID and PID, change the Bus Blaster USB IDs
• FT2232 MPSSE programming examples

Drivers

There are few different drivers that support the FTDI FT2232 chip under Windows, Linux, and Mac.

FTDI drivers

Not GPL compatible

• Windows, Linux, MAC
• FT2232 drivers on MacOSX

libFTDI

GPL driver, alternative to D2xx. Built on top of libusb.

• libftdi
• libusb-win32
• libUSB Linux

Resources

• FT2232H
• FTDI2232 datasheet
• V1 Manufacturing resources
• V2 Manufacturing resources
• Bus Blaster v2 and v3 self-test

License

• Hardware: CC-BY-SA
• Software: CC-0, GPL for UrJTag