SPI

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Contents

Overview

  • Bus: SPI (serial peripheral interface).
  • Connections: four pins (MOSI/MISO/CLOCK/CS) and ground.
  • Output type: 3.3volt normal, or open collector (pull-up resistors required).
  • Pull-up resistors: required for open drain output mode (2K – 10K).
  • Maximum voltage: 5.5volts (5volt safe).
  • Last documentation update: v5.8.

Configuration options

Speed - 30, 125, 250 kHz; 1, 2, 2.6, 4, 8 MHz

Clock polarity - idle low, idle high.

Output clock edge - idle to active, active to idle. Point at which data is changed on the SDO line, this does not include the MSB (first bit) which is ready immediately after CS becomes active.

Input sample phase - middle, end.

Output type - open drain/open collector (high=Hi-Z, low=ground) , normal (high=3.3volts, low=ground). Use open drain/open collector output types with pull-up resistors for multi-voltage interfacing.

Syntax

A/a/@ Toggle auxiliary pin. Capital “A” sets AUX high, small “a” sets to ground. @ sets aux to input (high impedance mode) and reads the pin value.
D/d Measure voltage on the ADC pin (v1+ hardware only).
W/w Capital ‘W’ enables the on-board power supplies. Small ‘w’ disables them. (v1+ hardware only).
[ Chip select (CS) active (low).
{ CS active (low), show the SPI read byte after every write.
] or } CS disable (high).
r Read one byte by sending dummy byte (0xff). (r:1…255 for bulk reads)
0b Write this binary value. Format is 0b00000000 for a byte, but partial bytes are also fine: 0b1001.
0x Write this HEX value. Format is 0×01. Partial bytes are fine: 0xA. A-F can be lower-case or capital letters.
0-255 Write this decimal value. Any number not preceded by 0x or 0b is interpreted as a decimal value.
, Value delimiter. Use a coma or space to separate numbers. Any combination is fine, no delimiter is required between non-number values: {0xa6,0, 0 16 5 0b111 0xaF}.
& Delay 1uS. (&:1…255 for multiple delays)
(#) Run macro, (0) for macro list

Macro

0 Macro menu
1 SPI bus sniffer, sniff when CS is low (hardware CS filter)
2 SPI bus sniffer, sniff all traffic (no CS filter)
3 SPI bus sniffer, sniff when CS is high (software CS filter) Temporarily removed to increase speed.
10 Change clock polarity to 0 without re-entering SPI mode
11 Change clock polarity to 1 without re-entering SPI mode
12 Change clock edge to 0 without re-entering SPI mode
13 Change clock edge to 1 without re-entering SPI mode
14 Change sample phase to 0 without re-entering SPI mode
15 Change sample phase to 1 without re-entering SPI mode

SPI Bus sniffer

The Bus Pirate can read the traffic on an SPI bus.

The SPI sniffer is implemented in hardware and should work up to 10MHz. It follows the configuration settings you entered for SPI mode.

Warning! Enter sniffer mode before connecting the target!!
The Bus Pirate SPI CLOCK or DATA lines could be grounded and ruin the target device!
Reset with the CS pin to clear garbage if needed

Pin connections are the same as normal SPI mode. Connect the Bus Pirate clock to the clock on the SPI bus you want to sniff. The data pins MOSI and MISO are both inputs, connect them to the SPI bus data lines. Connect the CS pin to the SPI bus CS pin.

  • [/] – CS enable/disable
  • 0xXX – MOSI read
  • (0xXX) – MISO read

SPI CS pin transitions are represented by the normal Bus Pirate syntax. The byte sniffed on the MISO pin is displayed inside ().

SPI> (0)
0.Macro menu
1.Sniff CS low
2.Sniff all traffic
SPI> (1)
Sniffer
Any key to exit
[0x30(0x00)0xff(0x12)0xff(0x50)][0x40(0x00)]

The SPI sniffer can read all traffic, or filter by the state of the CS pin. The byte sniffed on the MOSI pin is displayed as a HEX formatted value, the byte sniffed on the MISO pin is inside the ().

There may be an issue in the sniffer terminal mode from v5.2+.
Try the binary mode sniffer utility for best results.

Notes

The sniffer uses a 4096byte output ring buffer. Sniffer output goes into the ring buffer and gets pushed to the PC when the UART is free. This should eliminate problems with dropped bytes, regardless of UART speed or display mode.

Warning! Enter sniffer mode before connecting the target!!
The Bus Pirate SPI CLOCK or DATA lines could be grounded and ruin the target device!
Reset with the CS pin to clear garbage if needed
  • A long enough stream of data will eventually overtake the buffer, after which the MODE LED turns off (v5.2+). No data can be trusted if the MODE LED is off - this will be improved in a future firmware.
  • The SPI hardware has a 4 byte buffer. If it fills before we can transfer the data to the ring buffer, then the terminal will display "Can't keep up" and drop back to the SPI prompt. This error and the ring buffer error will be combined in a future update.
  • Any commands entered after the sniffer macro will be lost.
  • Pins that are normally output become inputs in sniffer mode. MOSI, CLOCK, MISO, and CS are all inputs in SPI sniffer mode.
  • Since v5.3 the SPI sniffer uses hardware chip select for the CS low sniffer mode. The minimum time between CS falling and the first clock is 120ns theoretical, and less then 1.275us in tests. The software CS detect (CS high sniffer mode) requires between 27usec and 50usec minimum delay between the transition of the CS line and the start of data. Thanks to Peter Klammer for testing and updates.
  • The sniffer follows the output clock edge and output polarity settings of the SPI mode, but not the input sample phase.

Clock edge/clock polarity/sample phase macros

Macros 10-15 change SPI setttings without disabling the SPI module. I have no idea if this will work or if it's allowable. These macros were added at a user's request, but they never reported if it worked. More here.

SPI> (10)(11)(12)(13)(14)(15)
SPI (spd ckp ske smp csl hiz)=( 3 0 1 0 1 1 )
SPI (spd ckp ske smp csl hiz)=( 3 1 1 0 1 1 )
SPI (spd ckp ske smp csl hiz)=( 3 1 0 0 1 1 )
SPI (spd ckp ske smp csl hiz)=( 3 1 1 0 1 1 )
SPI (spd ckp ske smp csl hiz)=( 3 1 1 0 1 1 )
SPI (spd ckp ske smp csl hiz)=( 3 1 1 1 1 1 )
SPI>

Connections

Bus Pirate Dir. Circuit Description
MOSI MOSI Master Out, Slave In
MISO MISO Master In, Slave Out
CS CS Chip Select
CLK CLK Clock signal
GND GND Signal Ground