Logic Sniffer 101

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Contents

First connection

Assign .inf on Windows

OLS-found 001.png

  • The OLS connects to a computer as a USB virtual serial port in normal operating mode. The first time you plug it in, give Windows the .inf file from a firmware archive to assign the correct drivers.

Get a software client

Download and install a logic analyzer client. There are several, but we recommend Jawi's SUMP fork. SUMP requires Java, get it here. More about using SUMP in Logic Sniffer 102.

Operating modes

A PIC microcontroller is the interface glue for the Logic Sniffer. It has three operating modes:

  1. Normal - a SPI to USB bridge for the SUMP logic analyzer (appears as a serial port)
  2. ROM Updater - upload a new FPGA bitstream to the ROM chip (appears as a serial port)
  3. Bootloader - update the main firmware in the PIC (appears as a USB HID device)

Normal mode

The PIC usually operates in a transparent USB->SPI bridge that connects the SUMP build in the FPGA with the SUMP client on a computer. This is the default startup mode after a reset or power-up. Press the reset button to enter normal operating mode from any other mode.

After a reset, the PIC performs a self-test on the power supplies and pull-up resistors.
If there are any problems the LED will blink rapidly.

The ACT LED will blink while the FPGA loads the bitstream contained in the ROM chip. If the FPGA doesn't load after a few seconds, because of an error or blank ROM chip, the PIC will automatically enter ROM update mode and the ACT LED will illuminate (see ROM updater below).

The ACT LED will turn off when the FPGA is configured and ready. The OLS then enumerates as a USB virtual serial port device. The first time you plug it in, you may need to feed Windows the .inf file in the project archive to assign driver to the device.

Once enumerated, the ACT LED blinks to indicate any USB activity.

ROM Updater

ROM updater mode is used to program a new FPGA bitstream into the flash storage chip.This feature lets us release FPGA design updates that can be loaded over the USB interface.

To enter ROM update mode, press the reset button while holding the update button. The PIC will also automatically enter ROM update mode if the FPGA doesn't load correctly because of an error or blank ROM chip. The ACT LED will light in this mode.

The OLS enumerates as a USB virtual serial port in ROM update mode, this is the same connection type as the normal operating mode. The first time you plug it in, give Windows the .inf file from the project folder to assign the correct drivers to the device.

Bootloader

We used the Diolan open source (GPL) USB bootloader in this project. The bootloader appears as a USB HID device, and a small utility uploads a new firmware to the PIC. We started with the bootloader source from the Dangerous Prototypes' USB Infrared Toy and ported it to the 18F24J50.

Enter bootloader mode by placing a jumper between PGC and PGD pins and press the reset button, or run the ols-loader utility with the -b flag. The ACT LED will light when the bootloader is active. Use the fw_update.exe utility under Windows, or ols-fw-update under Linux to load new PIC firmware with the bootloader.

LED indicators

Olsd-1.png

ACT and PWR LED

The PWR LED indicates that the board is powered over USB. It will stay on until the board is disconnected from USB.

ACT LED Status
Blinking, then off with TRIG LED on Normal SUMP mode
Solid Bootloader or ROM update mode
Rapid blinking Failed self-test
Blinking, then solid on (TRIG LED off) FPGA failed to load, auto enter ROM update mode

The ACT LED shows the connection status and current Logic Sniffer mode (normal, bootloader, ROM update, or self-test error). The ACT LED will also blink to show USB data transfer activity.

Error: failed self-test

The PIC does a self-test at each power on to make sure the major components of the Logic Sniffer are working. If the test fails, the ACT LED will blink rapidly and the Logic Sniffer will not continue the loading process. It currently tests:

  1. Pull-up resistors must be high (update button, R4)
  2. 2.5volt power must be within 10% (VR2)
  3. 1.2volt power must be within 10% (VR3) *rev 1.03+ only

Error: FPGA failed to load

The FPGA loads the logic analyzer bitstream from the flash storage chip on the Logic Sniffer. It takes a second to load, the ACT LED will blink while the PIC waits for it to complete. When the ROM is loaded the TRIG LED will turn on.

The PIC won't wait forever though. If the FPGA fails to load after a few seconds, because of damage or a blank flash ROM chip, the PIC will automatically enter ROM update mode and the ACT LED turns solid on (the TRIG LED should be off).

A possible solution is to try reloading the FPGA bitstream with the ols-loader utility.

ARM and TRIG LED

LED functions in normal SUMP mode.

State TRIG ARM note
Power on ON OFF After connecting to USB the TRIG LED will turn on, and stay on, until a capture is started
Capture no trigger ON OFF TRIG LED stays on if no trigger is used for the capture
Capture with trigger OFF ON TRIG LED turns off, ARM LED turns on until the trigger condition is met
Capture complete ON OFF TRIG LED stays on after a capture begins

Pin numbering scheme

Open Bench Logic Sniffer v1.01 (OLS v1.01) Headers and Switches Buffered Probe Header and Unbuffered I/O Header – Channel Numbering Scheme

Olsd-1.png

Channel Assignment for Inside and Outside Numbering Scheme (can only be selected in “latest” SUMP Java client released together with bitstream release 2.04!)

Inside Numbering Scheme

Inside Numbering Scheme activated in SUMP Java Client:

Channel group 0 (channels 0-7) and channel group 1 (channels 8-15) on Buffered Probe Header!

Olsd-2.png

Channel group 2 (channels 16-23) and channel group 3 (channels 24-31) on Unbuffered I/O (Wing) Header!

Olsd-3.png

Outside Numbering Scheme

Outside Numbering Scheme activated in SUMP Java Client:

Channel group 0 (channels 0-7) and channel group 1 (channels 8-15) on Unbuffered I/O (Wing) Header!

Olsd-4.png

Channel group 2 (channels 16-23) and channel group 3 (channels 24-31) on Buffered Probe Header!

Olsd-5.png

Pin guide and graphics by IPenguin.

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