Ethernet JTAG debugger

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Contents

Overview

The goal of this project was to make a high-speed Ethernet and USB connected JTAG debugger for OpenOCD. It uses a PIC24FJ256GB106 with USB, and an ENC424J600 100MBPS Ethernet chip.

This project is currently stalled. We grew tired of messing with Microchips gratis-but-not-libre TCPIP stack, and lost interest in developing a new project with it.


Downloads

Schematic

Cct-EnetJTAGv0a.png

PCB

Board-EnetJTAG-v0a.png

Click for a full size placement image.

partlist
Parts Quantity Value Package
C1-C8,C11-C21 11 0.1uF C0603
C2,C16,C30 3 10uF SMC_A
C3,C4,C14,C15 4 27pf C0603
C9,C10 2 0.01uF C0603
C12,C13 2 6.8nF C0603
IC1 1 PIC24FJ256GB106 TQFP64-10X10
IC2,IC4,IC5 3 NC7WZ07P6X SC70-6
ICSP 1 1X05
J1 1 POWER_JACKSMD POWER_JACK_SMD
J3 1 HR911105A HR911105A
JP2 1 2X10
JTAG 1 1X06
L1 1 WE-KI_0805_B
PWR,PWR1,PWR2 3 CHIPLED_0603
Q1,Q2 2 25Mhz HC49UP
R1 1 12.4K 1% R0603
R2 1 10R, 1/12W, 1% R0603
R3 1 100K R0603
R4-R5,R5A-R9,R14-R17 12 1K1 R0603
R10,R11,R12,R13 4 49R9 1% R0603
U1 1 ENC424J600 TQFP44
VR1 1 LD117AD2MTR D2PACK
X2 1 USBSMD USB-MINIB

License