CPLD ring oscillator
A ring oscillator can be implemented through a shift register with an inverted input.
The ring oscillator is feeding a counter and the counter is feeding the two leds.
The most critical part was to prevent xst from optimizing away the ring oscillator. This is achieved by the "keep" syntheses attributes.
attribute KEEP : string; attribute KEEP of ring : signal is "true";
To test the design you simply have to upload the ringoscillator.svf to your coolrunnerII board. After the cpld is configured you have to reset the ring oscillator by pressing the button.
The design is highly inspired by www.lothar-miller.de
Regarding the stability of the clock I have to disagree with Lothar. The clock is only stable as long as the temp is stable. The frequnecy of the clock also varys from device to device.
Did some measurements. I get about 18MHz at room temperature. But as you can see in the attached screenshot my DSO really does a bad job measuring the frequency. Maybe I can take the board to work with me and do the measurements with a better scope.
I did the programming with the Bus Blaster. But I also have a Bus Pirate. According to the Bus Pirate we have:
HiZ>f AUX Frequency: 18,103,296 Hz