Bus Pirate I/O Pin Descriptions

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mode-guide

This table displays the Bus Pirate pinout in various modes. The Bus Pirate I/O pins try to be consistent across all libraries, the same pins are used for similar functions. Unused pins are usually in a safe high-impedance state.

Modes not shown in the above diagram are similar to other libraries: MIDI=UART; raw2wire=HD44780=PC keyboard=I2C; raw3wire=SPI. All bus pins output at 3.3volts, but tolerate up to 5volts (5.5volts maximum).

Pin descriptions
Pin Description
Master-out slave-in (MOSI) Primary data pin, it's used for bi-directional data transfer in protocols like I2C and 1-Wire, and as data-out from the Bus Pirate in uni-directional protocols like SPI and asynchronous serial (UART). In bus sniffer modes each pin becomes an input for the same signal usually assigned to that pin.
Clock Always a clock-out signal from the Bus Pirate, except in the PC keyboard library where the keyboard provides a clock signal to the Bus Pirate.
Master-in slave-out (MISO) Used with protocols that have a dedicated data-input, such as SPI and UART.
Chip select (CS) An output used to activate the serial interface in SPI-like protocols. Use the auxiliary pin config menu (c) to get manual control of the CS pin through the auxiliary pin commands (a, A, @).
Auxiliary(AUX)Used as an output or input from the Bus Pirate terminal interface with the A, a, and @ commands. It's useful for protocols that require an additional signal, such as a reset.

In bus sniffer modes each pin becomes an input for the same signal usually assigned to that pin.

Pin Header

IO Header on SOIC Image shows Colors from BusPirate ProbeKit available at Seeed Studio onSOIC Version

IO Header Image shows Colors from BusPirate ProbeKit available at Seeed Studio on latest Version

Bus Pirate - IO Pins
Pin NameDescription (Bus Pirate is the master)
MOSI Master data out, slave in (SPI, JTAG), Serial data (1-Wire, I2C, KB), TX* (UART)
CLK Clock signal (I2C, SPI, JTAG, KB)
MISO Master data in, slave out (SPI, JTAG) RX (UART)
CS* Chip select (SPI), TMS (JTAG)
AUX Auxiliary IO, frequency probe, pulse-width modulator
ADC Voltage measurement probe (max 6volts)
Vpu Voltage input for on-board pull-up resistors (0-5volts).
+3.3v* +3.3volt switchable power supply
+5.0v +5volt switchable power supply
GND Ground, connect to ground of test circuit

Notes:

* TX moved from CS to MOSI in firmware v0g
* on v2go ADC and +3V3 swapped