Bus Blaster v1 manufacturing resources
Manufacturing prototype verification
Download and install the drivers:
Download and install urJTAG:
We will chain scan the FPGA on the Logic Sniffer to verify the Bus Blaster functionality. You can use any simple FPGA, CPLD, or ARM development board for the test instead.
|Bus Blaster JTAG||Logic Sniffer JTAG|
- Connect the Bus Blaster to the Logic Sniffer as shown in the table
- Plug in the Bus Blaster USB
- Plug in the Logic Sniffer USB, LED2 (TARGET PRESENT) should light
- Start urJTAG
jtag> cable jtagkey
- Setup the Bus Blaster interface with "cable jtagkey"
- Perform the chain scan with "detect"
- urJTAG detects a Xilinx device, manufacturer unknown
jtag> detect Warning: TDO seems to be stuck at 1
If the chip is not detected:
- Check the JTAG connection
- Make sure there are no other FTDI chips attached to the PC (urJTAG might attach to wrong programmer)