We’re releasing a stalled or abandoned prototype every few days while Seeed Studio is on break. We put a lot of work into these projects, but they’re still missing major components and testing. If an abandoned project sparks your interest, we may have PCBs to get you started.
This project is currently stalled. We grew tired of messing with Microchips gratis-but-not-libre TCPIP stack, and lost interest in developing a new project with it.
- Our project files. Eagle schematic and PCB files
Schematic and PCB are on the Ethernet JTAG debugger wiki.