Workshop Video #44: Bus Blaster v3 design overview

in Bus Blaster, Videos by Ian | 6 comments

Bus Blaster v3 design overview, programming and self-test. We also thank Microchip for sending us 2 tubes of scratch ‘n’ dent 23LC1024 marked 23K1024. Read about the Bus Blaster v3 and how it came to be, below.

Update: new video with correct sound mixing

Bus Blaster v3 is the successor to the currently in stock Bus Blaster v2.5. It’s an experimental, high-speed JTAG debugger for ARM processors, FPGAs, CPLDs, flash, and basically anything that supports the JTAG interface. It’s completely open source and designed to work with open source software like openOCD, UrJTAG.

Many USB JTAG devices use FTDI’s FT2232 2 channel USB to JTAG IC, followed by discrete logic chips to interface the FT2232H with the target JTAG device.

In this JTAG programmer design Texas Instruments describes a crafty way to use a CPLD (a programmable logic chip) instead of discrete logic. The CPLD can be programmed to imitate many common buffer setups.

We took the design a step further. By tapping the second JTAG programming channel in the newer FT2232H we can program the CPLD with nothing but the programmer’s normal USB connection. This makes it simple to change the logic in the CPLD directly through USB.

Click image for a larger version.

In version Bus Blaster v3 we moved the Bus Blaster to a Sick of Beige DP8049 standard PCB. The USB jack is now opposite the connector, where you’d expect it to be on a case.

Click image for larger version.

The Bus Blaster can power devices at 3.3volts, or draw power from a target device. v2.5 has no protection if the target is over the 3.3volt maximum, in version 3 we added a resistor and zener diode to protect the programmer. We also added series resistors on all the IO lines to reduce noise and providing some additional protection to the CPLD from high voltages.

A few of the connection between the FT2232H chip and the CPLD were swapped in v3. The clock out pin from the FT2232H IC is now routed to a global clock pin on the CPLD. This gives the Bus Blaster the potential to be used as medium speed Logic Analyzer. We haven’t developed any software for this, and are not actively pursuing it, but the possibility is there for anyone who’d like to try.

Next we demonstrate how to program the Bus Blaster CPLD, and run a self test. All you need is to plug it into the USB and add some jumper wires. More on the wiki.

Next we use the Bus Blaster v3 to program our CPLD Coolrunner IIĀ  breakout board. You can get the CPLD board for $15 at Seeed.

Get your very own Bus Blaster v2.5 at Seeed for $35.

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Comments

  1. ken says:

    Please release this already :-)

  2. neslekkim says:

    cool info.
    But, you say that you currently sell v2.5?, on seeed it is v2?

  3. Tobias says:

    Love your products and your show!

  4. Filip says:

    We respond to 99% of connatct… The public forum will probaby get the fastest response, as the community will answer if we are late to, and they have the answer.

    If it’s of a non public nature contact us via the contact form, keep in mind Ian is in India till the end of the week, so if the question is directed only to him, he’ll probably respond when he gets back…

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