7400 competition entry: 4-bit SAR analog to digital converter

in 7400 contest, contest by DP | 0 comments

Marco entered a 4-bit SAR ADC made from discrete logic chips 74xx & 40xx series for the Open 7400 Logic Competition.

The SAR (Successive approximations) works by comparing the analog value to be converted with a generated value with a method similar to the mathematical bisection method. More precisely, it starts comparing, by a simple difference, the input value with Vref/2 (it divides the full range Vref in two halves); if the result is > 0 the N-bit (called MSB) = 1, i.e. the input value is greater than Vref/2, otherwise N-bit = 0. Now it divides the “new range”, upper or lower half of Vref, in two halves by setting the (N-1)-bit = 1, keeping the previous N-bit, and it compares this value with the input voltage. If the result > 0 then (N-1)-bit = 1, otherwise (N-1)-bit = 0. It then goes on with the (N-2)-bit and so forth to the LSB. The conversion time is, at best, Tck*N. The generated value for the comparison is digital, so a DAC is needed to do the comparison with the analog input value.

Check out the video below.

Build something that uses or abuses a logic chip and get amazing boards, tools, and other swag. The Open 7400 Logic Competition promotes awareness of the basic building blocks of modern circuits. Devious geeks ignited the computer revolution with discrete logic computers, what can you do? Details and entry form here.

Via the contact form.

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