ALSE free IP cores for non-commercial CPLD/FPGA dev
Advanced Logic Synthesis for Electronics (ALSE) is a Paris based company providing product development, IP consulting and training courses involving HDL, ASIC and FGPA devices. They are making available a series of IP cores free for personal, non-commercial use. They state:
For non-commercial projects only, we have taken the decision to offer some functions for free, provided that you respect the disclaimers and restrictions appearing in the IPs. In particular, you cannot remove the headers or use these IPs in commercial or research projects without the prior written authorization from ALSE.
You can access these cores and more info from the ALSE Free Intellectual Properties page. The cores offered include a 2-line LCD controller, quadrature encoder, keyboard encoder, the obligatory LED blinker and more.
We noticed an interesting download titled RS232 basics for FPGA coders, which explains the protocol basics in regard to coding up a UART. After reading this document, move onto ALSE’s UART IP doc, explaining the process of coding a simple UART in greater detail. These are excellent resources for beginning VHDL coders to examine.
This entry was posted in code, CPLD, FPGA and tagged ALSE, IP cores.
Comments
I am sure you know it already. Just want to point out
http://www.opencores.org is full of free designs for FPGA and Co,
excellent VHDL UART code written by Bert Cuzea of alse-fr.com
direct links on french sites:
[url="http://electronix.ru/redirect.php?http://bravo.univ-tln.fr/er/Temp%202012%202013/ALSE_uart_simple.zip"/url]
[url="https://www.polytech.upmc.fr/~douze/E2i4/Projet/IP/ALSE_Uart_simple.zip"/url]