Tomorrow we’re talking with Plunify, the developers of an online compiler for Altera and Xilinx CPLDs/FPGAs. They added the CPLD dev-board demos to a list of project examples, and made a tutorial video. We put together a how-to when we tested it.
Unfortunately, Xilinx has not yet given Plunify permission to use the compiler in this fashion, so the tutorial cannot go live for the moment… We’ll talk to them about that happened, and ask your questions too.
Please post questions in the comments below, or in the forum.