Dangerous DSO part 5: Testing and conclusions
It’s the last day of our week-long Dangerous DSO adventure. Yesterday we simulated the analog front-end and found a few changes to test. First, we’re going to increase the ADC buffer gain to 2. That should make vertical offset adjustment easier. Second, we’re going to try a more refined input range divider with a 900K fixed resistor and 100K trimmer resistor. For background on the front-end see the previous articles.
We hope you enjoyed this series, we had a blast designing the hardware and writing about it. Dangerous DSO v1 PCBs are in the free PCB drawer, if you are serious about building this board please let us know via the contact form. The Dangerous DSO source download includes the v1 design files, the current v1a update, and LTspice simulation files. Now on to the final day of testing!
A big thank you to everyone who helped realize this project. It would not have been possible without you.
Dangerous DSO is a new logic analyzer/oscilloscope design we’ve been using in the lab. This is not a finished project, it will not be produced. We’re posting our current progress to get some feedback. Don’t miss Part 1: There’s so much between 0 and 1, Part 2: Feed and water your ADC, Part 3: Messing with the front end, and Part 4: Over simulated.
This capture was done with the original circuit and an op-amp gain of 1.667.
Set gain to 2
Our LTspice simulations showed that it’s easier to get a 2volt offset for the ADC when the op-amp gain is 2. The original Bitscope ADC buffer has a gain of 1.667.
- To solve for gain set Vin=1 and enter the resistor values
Gain is determined by R33 and R34. To set the gain at 2 we replaced the 330ohm op-amp feedback resistor with 220ohm. This forms a 1:2 divider between the inverting input and the the op-amp output. Now the output to responds double to changes of input.
Here’s a capture with an op-amp gain of 2. The extra gain made the input adjustment really difficult. We couldn’t calibrate it as well as before.
The transitions seem to over/undershoot a lot. We guess this is op-amp noise and not part of the actual signal. This looks too messy to believe it’s representative of the PIC PWM output.
Mod input divider for better control
Double gain means we need to divide a +/-10volt input signal by 40 before feeding it to the op-amp.
- 0.975M+0.025M=/40=+/- 10volt input
- 0.950M+0.050M=/20=+/- 5volt input
- 0.900M+0.100M=/10=+/- 2.5volt input
Most usable input ranges are in the bottom 100K ohms of the trimmer. A single-turn trimmer resistor give us about 5degrees of usable adjustment room, that makes calibration a pain.
We removed the 1M trimmer and replaced it with a 100K trimmer. The extra 900K ohms comes from a fixed value resistor. We didn’t have a 100K SMD trimmer, so this test was done with a breadboard and through-hole parts.
Here’s a capture with an op-amp gain of 2 and the modified input divider. The input range was a lot easier to adjust, definitely a worthwhile update to the next revision. Noise and garbage from using a breadboard and fly-wires is obvious.
Between each circuit update we recalibrate the center offset and input divider. This is the basic procedure:
- Connect the oscilloscope input to ground
- Run a capture
- Adjust the offset with R8 a little each time and do another capture
- Repeat step 3 until the oscope line is in the middle of the graph
- Once centered, remove the ground connection
- Connect the input to a 50kHz square wave from the Bus Pirate (command g, then both default values)
- Perform captures and adjust the input divider with R12 until the signal fits in the limits of the display
Things don’t look great for the double gain setup. Additional gain seems to magnify noise, moving back to 1.667 would probably be best. After Maker Faire we’ll post a few comparisons against an actual o-scope.Development, FPGA, oscilloscope, Prototypes and tagged Dangerous DSO, gain, op-amps, testing.