Open source logic analyzer update
A few months ago we started working with the Gadget Factory to build an open source logic analyzer. After a very successful collaboration, we’re almost ready to order the first PCBs. Click here for a large PCB image [PNG].
The draft device has 16 buffered (5volt tolerant) input channels, and 16 unbuffered I/O channels on a wing header. The PC connection is USB 2.0 with a PIC18F24J50 microcontroller. Both the PIC and the FPGA firmware will be USB upgradable.
You can follow our most recent progress in the forum. Uwe’s block diagram of the final design follows.
Block diagram maintained by Uwe. Click for a large image version [PNG].This entry was posted in logic analyzer and tagged logic analyzer, open source, SUMP.